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hm62832h series 32768-word 8-bit high speed cmos static ram features high speed: fast access time 25/35/45 ns (max) low power active: 300 mw (typ) standby: 10 m w (typ) (l-version) single 5 v supply completely static memory no clock or timing strobe required equal access and cycle times common data input and output ?three state output directly ttl compatible ?all inputs and outputs ordering information type no. access time package HM62832HP-25 hm62832hp-35 hm62832hp-45 25 ns 35 ns 45 ns 300-mil 28-pin plastic dip (dp-28na) hm62832hlp-25 hm62832hlp-35 hm62832hlp-45 25 ns 35 ns 45 ns hm62832hjp-25 hm62832hjp-35 hm62832hjp-45 25 ns 35 ns 45 ns 300-mil 28-pin plastic soj (cp-28dn) hm62832hljp-25 hm62832hljp-35 hm62832hljp-45 25 ns 35 ns 45 ns
hm62832h series 2 pin arrangement (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v cc we a13 a8 a9 a11 oe a10 cs i/o 7 i/o 6 i/o 5 i/o 4 i/o 3 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o 0 i/o 1 i/o 2 v ss pin description pin name function a0 ?a14 address i/o0 ?i/o7 input/output cs chip select we write enable oe output enable v cc power supply v ss ground
hm62832h series 3 block diagram x address buffer row decoder memory array 512 512 i/o buffer column i/o column decoder y address buffer a2 a1 a0 a10 a11 a9 a8 a13 a14 a12 a7 a6 a5 a4 a3 i/o 0 i/o 7 we oe cs v cc v ss absolute maximum ratings parameter symbol value unit voltage on any pin relative to v ss v t ?.5 *1 to +7.0 v power dissipation p t 1.0 w operating temperature topr 0 to +70 c storage temperature tstg ?5 to +125 c storage temperature under bias tbias ?0 to +85 c note: 1. ?.5 v for pulse width 10 ns function table cs oe we mode v cc current i/o pin ref. cycle h x x not selected i sb , i sb1 high-z l l h read i cc dout read cycle (1) to (3) l h l write i cc din write cycle (1) lll i cc din write cycle (2) note: x: h or l
hm62832h series 4 recommended dc operating conditions (ta = 0 to +70 c) parameter symbol min typ max unit supply voltage v cc 4.5 5.0 5.5 v v ss 00 0v input voltage v ih 2.2 6.0 v v il ?.5 *1 0.8 v note: 1. ?.0 v for pulse width 10 ns dc characteristics (ta = 0 to +70 c, v cc = 5 v 10%, v ss = 0 v) parameter symbol min typ *1 max unit test conditions note input leakage current |i li |2 m a vin = v ss to v cc output leakage current |i lo |2 m a cs = v ih or oe = v ih or we = v il , v i/o = v ss to v cc operating power supply current i cc 60 120 ma min cycle, duty = 100%, cs = v il , i i/o = 0 ma standby power supply current i sb ?5 30ma cs = v ih standby power supply current i sb1 0.02 2 ma cs 3 v cc ?0.2 v 0 v vin 0.2 v or vin 3 v cc ?0.2 v 0.002 0.1 ma l-version output voltage v ol 0.4 v i ol = 8 ma v oh 2.4 v i oh = ? ma note: 1. typical values are at v cc = 5.0 v, ta = +25 c and not guaranteed. capacitance (ta = 25 c, f = 1.0 mhz) *1 parameter symbol min typ max unit test conditions input capacitance cin 6 pf vin = 0 v input/output capacitance c i/o 10pfv i/o = 0 v note: 1. this parameter is sampled and not 100% tested.
hm62832h series 5 ac characteristics (ta = 0 to +70 c, v cc = 5 v 10%, unless otherwise noted.) test conditions input pulse levels: 0.0 v to 3.0 v input rise and fall time: 5 ns input and output timing reference levels: 1.5 v output load: see figures dout 255 w 480 w +5 v 30 pf *1 dout 255 w 480 w +5 v 5 pf *1 output load (a) note: 1. including scope and jig output load (b) (for t clz , t olz , t chz , t ohz , t whz and t ow ) read cycle hm62832h-25 hm62832h-35 hm62832h-45 parameter symbol min max min max min max unit note read cycle time t rc 25 35 45 ns address access time t aa 25 35 45 ns chip select access time t acs 25 35 45 ns output enable to output valid t oe 12 15 20 ns output hold from address change t oh 555ns6 chip selection to output in low-z t clz 555ns1 output enable to output in low-z t olz 000ns1 chip deselection to output in high-z t chz 012015020ns1 output enable to output in high-z t ohz 012015020ns1
hm62832h series 6 write cycle hm62832h-25 hm62832h-35 hm62832h-45 parameter symbol min max min max min max unit notes write cycle time t wc 25 35 45 ns chip selection to end of write t cw 15 20 25 ns address valid to end of write t aw 20 30 40 ns address setup time t as 0 00ns write pulse width t wp 15 20 25 ns 3 write recovery time t wr 0 00ns4 write to output in high-z t whz 0 12 0 15 0 20 ns 2, 5 data to write time overlap t dw 12 15 20 ns data hold from write time t dh 0 00ns output disable to output in high-z t ohz 0 12 0 15 0 20 ns 2, 5 output active from end of write t ow 5 5 5 ns 2, 7 notes: 1. transition is measured 200 mv from steady state voltage with load (b). this parameter is sampled and not 100% tested. 2. transition is measured 200 mv from high impedance voltage with load (b). this parameter is sampled and not 100% tested. 3. a write occurs during the overlap (t wp ) of a low cs and a low we . 4. t wr is measured from the ealier of cs or we going high to the end of write cycle. 5. during this period, i/o pins are in the output state. the input signals out of phase must not be applied. 6. dout is in the same phase of written data of this write cycle. 7. if cs is low during this period, i/o pins are in the output state. the input signals out of phase must not be applied to i/o pins.
hm62832h series 7 timing waveforms read cycle timing? *1 ( we = v ih ) t rc t aa t oe t olz t oh t acs t clz t ohz t chz dout cs oe address valid data note: 1. transition is measured 200 mv from steady state voltage with load (b). this parameter is sampled and not 100% tested. read cycle timing? ( we = v ih , cs = v il , oe = v il ) t rc address t aa t oh t oh dout valid data
hm62832h series 8 read cycle timing? *1 ( we = v ih , oe = v il ) t acs t clz t chz dout cs valid data notes: 1. transition is measured 200 mv from steady state voltage with load (b). this parameter is sampled and not 100% tested. 2.address should be valid prior to or coincident with cs transition low. write cycle timing? *2 t wc address oe cs we dout din t cw *1 t aw t as t ohz t wp t dw t dh t wr valid data notes: 1. if the cs low transition occurs simultaneously with the we low transition or after the we low transition, outputs remain in a high impedance state. 2. we must be high during all address transitions except when device is deselected with cs .
hm62832h series 9 write cycle timing? *3 ( oe low fixed) t wc address t cw t wr t wp *1 t oh t ow *2 t whz t dh t dw t as cs we dout din valid data notes: 1. if the cs low transition occurs simultaneously with the we low transition or after the we low transition, outputs remain in a high impedance state. 2.dout is the read data of next address. 3. we must be high during all address transitions except when device is deselected with cs .
hm62832h series 10 low v cc data retention characteristics (ta = 0 to +70 c) this characteristics is guaranteed only for l-version. parameter symbol min typ max unit test conditions v cc for data retention v dr 2.0 v cs 3 v cc ?0.2 v, vin 3 v cc ?0.2 v or 0 v vin 0.2 v data retention current i ccdr ? 50 *1 m a chip deselect to data retention time t cdr 0 ns operation recovery time t r 5 ms note: 1. v cc = 3.0 v low v cc data retention timing waveform t cdr t r data retention mode cs 3 v cc ?0.2 v v cc 4.5 v 2.2 v v dr1 0 v cs 1.3 1.2 1.1 1.0 0.9 0.8 0.7 4.5 4.75 5.0 5.25 5.5 ta = 25? supply voltage v (v) low level input voltage v (normalized) cc il low level input voltage vs. supply voltage
hm62832h series 11 1.3 1.2 1.1 1.0 0.9 0.8 0.7 4.5 4.75 5.0 5.25 5.5 ta = 25? supply voltage v (v) cc high level input voltage v (normalized) ih high level input voltage vs. supply voltage 1.6 1.4 1.2 1.0 0.8 0.6 0.4 12 34 5 ta =25? v = 5 v high level output voltage v (v) oh cc high level output current i (normalized) oh high level output current vs. high level output voltage
hm62832h series 12 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 0.2 0.4 0.6 ta = 25? v = 5 v low level output voltage v (v) low level output current i (normalized) ol ol cc 0.8 low level output current vs. low level output voltage 10 0 20 40 60 80 ambient temperature ta (?) v = 3 v cc standby current i (a) sbi cs = 2.8 v ? 10 ? 10 ? 10 ? standby current vs. ambient temperature
hm62832h series 13 1.4 1.2 1.0 0.8 0.6 0.4 0.2 2 34 56 supply voltage v (v) cc standby current i (normalized) sbi ta = 25? cs = v ?0.2 v cc standby current vs. supply voltage 1.6 1.4 1.2 1.0 0.8 0.6 0.4 4.75 4.5 5.0 5.25 5.5 ta = 25? supply current i (normalized) cc supply voltage v (v) cc supply current vs. supply voltage
hm62832h series 14 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0204060 ambient temperature ta (?) supply current i (normalized) cc v = 5.0 v cc 80 supply current vs. ambient temperature 1.3 1.2 1.1 1.0 0.9 0.8 0.7 4.5 4.75 5.0 5.25 5.5 ta = 25? access time t , t (normalized) aa acs supply voltage v (v) cc access time vs. supply voltage
hm62832h series 15 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0 50 100 150 200 load capacitance c (pf) l access time t , t (normalized) aa acs access time vs. load capacitance 0.9 0.8 1.3 1.2 1.1 1.0 0.7 020406080 ambient temperature ta (?) access time t , t (normalized) aa acs v = 5.0 v cc access time vs. ambient temperature
hm62832h series 16 66 50 40 33 29 25 1.4 1.2 1.0 0.8 0.4 0.2 10 15 20 25 30 35 40 frequency f (mhz) supply current i (normalized) cc 0.6 supply current vs. frequency
hm62832h series 17 package dimensions hm62832hp/hlp series (dp-28na) unit: mm 2.54 min 5.08 max 2.54 ?0.25 0.48 ?0.10 0??15 0.25 + 0.11 ?0.05 36.00 37.32 max 1.3 7.10 7.37 max 1 28 15 14 7.62 0.51 min 2.20 max hm62832hjp/hljp series (cp-28dn) unit: mm 0.43 ?0.10 3.50 ?0.26 15 28 1 14 6.76 + 0.21 ?0.24 2.40 + 0.35 ?0.16 0.74 18.54 max 18.17 7.62 ?0.13 8.64 ?0.13 1.30 max 0.10 0.80 +0.25 ?.17 1.27

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